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data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3vdc ?14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current * ul is a registered trademark of underwriters laboratories, inc. ? csa is a registered trademark of canadian standards association. ? vde is a trademark of verband deutscher elektrotechniker e.v. ** iso is a registered trademark of the international organization of standards document no: ds10-008 ver. 1.14 pdf name: pvx012a0x. p df features ? compliant to rohs eu directive 2002/95/ec (z versions) ? compatible in a pb-free or snpb reflow environment (z versions) ? compliant to ipc-9592 (september 2008), category 2, class ii ? dosa based ? wide input voltage range (3vdc-14.4vdc) ? output voltage programmable from 0.6vdc to 5.5vdc via external resistor ? tunable loop tm to optimize dynamic output voltage response ? power good signal ? fixed switching frequency ? output overcurrent protection (non-latching) ? overtemperature protection ? remote on/off ? ability to sink and source current ? cost efficient open frame design ? small size: 12.2 mm x 12.2 mm x 8.5 mm (0.48 in x 0.48 in x 0.335 in) ? wide operating temperature range [-40c to 85c] ? ul * 60950-1recognized, csa ? c22.2 no. 60950-1-03 certified, and vde ? 0805:2001-12 (en60950-1) licensed ? iso** 9001 and iso 14001 certified manufacturing facilities applications ? distributed power architectures ? intermediate bus voltage applications ? telecommunications equipment ? servers and storage applications ? networking equipment ? industrial equipment description the 12a analog pico dlynx tm power modules are non-isolated dc-dc converters that can deliver up to 12a of output current. these modules operate over a wide range of input voltage (v in = 3vdc-14.4vdc) and provide a precisely regulated output voltage from 0.6vdc to 5.5vdc, programmable via an external resistor. features include remote on/off, adjustable output voltage, over current and over temperature protection. the tunable loop tm feature allows the user to optimize the dynamic response of the converter to match the load with reduced amount of output capacitance leading to savings on cost and pwb area. trim vout sense gnd ctune rtune rtrim vin co cin vin+ vout+ on/off pgood module rohs compliant
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 2 absolute maximum ratings stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are absolute stress ratings only, functional operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. exposure to absolute maximum ratings for extended periods can adversely affect the device reliability. parameter device symbol min max unit input voltage all v in -0.3 15 vdc continuous operating ambient temperature all t a -40 85 c (see thermal considerations section) -d version t a -40 105 c storage temperature all t stg -55 125 c electrical specifications unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. parameter device symbol min typ max unit operating input voltage all v in 3 ? 14.4 vdc maximum input current all i in,max 12 adc (v in =3v to 14v, i o =i o, max ) input no load current (v in = 12.0vdc, i o = 0, module enabled) v o,set = 0.6 vdc i in,no load 45 ma v o,set = 5vdc i in,no load 75 ma input stand-by current (v in = 12.0vdc, module disabled) all i in,stand-by 0.65 ma inrush transient all i 2 t 1 a 2 s input reflected ripple current, peak-to-peak (5hz to 20mhz, 1 h source impedance; v in =0 to 14v , i o = i omax ; see test configurations) all 40 map-p input ripple rejection (120hz) all -60 db
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 3 electrical specifications (continued) parameter device symbol min typ max unit output voltage set-point (with 0.1% tolerance for external resistor used to set output voltage) all v o, set -1.0 +1.0 % v o, set output voltage (over all operating input voltage, resistive load, and temperature conditions until end of life) all v o, set -3.0 ? +3.0 % v o, set adjustment range (selected by an external resistor) (some output voltages may not be possible depending on the input voltage ? see feature descriptions section) all v o 0.6 5.5 vdc remote sense range all 0.5 vdc output regulation (for v o 2.5vdc) line (v in =v in, min to v in, max ) all ? +0.4 % v o, set load (i o =i o, min to i o, max ) all ? 10 mv output regulation (for v o < 2.5vdc) line (v in =v in, min to v in, max ) all ? 5 mv load (i o =i o, min to i o, max ) all ? 10 mv temperature (t ref =t a, min to t a, max ) all ? 0.4 % v o, set output ripple and noise on nominal output (v in =v in, nom and i o =i o, min to i o, max co = 0.1 f // 22 f ceramic capacitors) peak-to-peak (5hz to 20mhz bandwidth) all ? 50 100 mv pk-pk rms (5hz to 20mhz bandwidth) all 20 38 mv rms external capacitance 1 without the tunable loop tm esr 1 m ? all c o, max 22 ? 47 f with the tunable loop tm esr 0.15 m ? all c o, max 22 ? 1000 f esr 10 m ? all c o, max 22 ? 5000 f output current (in either sink or source mode) all i o 0 12 adc output current limit inception (hiccup mode) (current limit does not operate in sink mode) all i o, lim 200 % i o,max output short-circuit current all i o, s/c 1.5 arms (v o 250mv) ( hiccup mode ) efficiency v o,set = 0.6vdc 77.5 % v in = 12vdc, t a =25c v o, set = 1.2vdc 85.9 % i o =i o, max , v o = v o,set v o,set = 1.8vdc 89.6 % v o,set = 2.5vdc 92.4 % v o,set = 3.3vdc 93.4 % v o,set = 5.0vdc 95.0 % switching frequency all f sw ? 600 ? khz 1 external capacitors may require using the new tunable loop tm feature to ensure that the module is stable as well as getting the best transient response. see the tunable loop tm section for details.
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5. 5vdc output; 12a output current lineage power 4 general specifications parameter device min typ max unit calculated mtbf (i o =0.8i o, max , t a =40c) telecordia issue 2 method 1 case 3 all 16,817,995 hours weight ? 2.33(0.082) ? g (oz.) feature specifications unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. see feature descriptions for additional information. parameter device symbol min typ max unit on/off signal interface (v in =v in, min to v in, max ; open collector or equivalent, signal referenced to gnd) device is with suffix ?4? ? positive logic (see ordering information) logic high (module on) input high current all i ih ? 1 ma input high voltage all v ih 3.0 ? v in,max vdc logic low (module off) input low current all i il ? ? 10 a input low voltage all v il -0.2 ? 0.3 vdc device code with no suffix ? negative logic (see ordering information) (on/off pin is open collector/drain logic input with external pull-up resistor; signal referenced to gnd) logic high (module off) input high current all i ih D D 1 ma input high voltage all v ih 3.0 D v in, max vdc logic low (module on) input low current all i il D D 10 a input low voltage all v il -0.2 D 0.4 vdc turn-on delay and rise times (v in =v in, nom , i o =i o, max , v o to within 1% of steady state) case 1: on/off input is enabled and then input power is applied (delay from instant at which v in = v in, min until v o = 10% of v o, set ) all tdelay D 5 D msec case 2: input power is applied for at least one second and then the on/off input is enabled (delay from instant at which von/off is enabled until v o = 10% of v o, set ) all tdelay D 5 D msec output voltage rise time (time for v o to rise from 10% of vo, set to 90% of vo, set ) all trise D 2 D msec output voltage overshoot (t a = 25 o c 3.0 % v o, set v in = v in, min to v in, max ,i o = i o, min to i o, max ) with or without maximum external capacitance over temperature protection all t ref 120/ 130 c (see thermal considerations section)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 5 feature specifications (cont.) parameter device symbol min typ max units input undervoltage lockout turn-on threshold all 2.9 vdc turn-off threshold all 2.6 vdc hysteresis all 0.3 vdc pgood (power good) signal interface open drain, v supply 5vdc overvoltage threshold for pgood 112.5 %v o, set undervoltage threshold for pgood 87.5 %v o, set pulldown resistance of pgood pin all 30
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 6 characteristic curves the following figures provide typical characteristics for the 12a analog pico dlynx tm at 0.6vo and 25 o c. efficiency, (%) output current, io (a) output current, i o (a) ambient temperature, t a o c figure 1. converter efficiency versus output current. figure 2. derating output current versus ambient temperature and airflow. output voltage v o (v) (20mv/div) output current, output voltage i o (a) (10adiv) v o (v) (5mv/div) time, t (1 s/div) time, t (20 s /div) figure 3. typical output ripple and noise (c o =22 f ceramic, v in = 12v, i o = i o,max, ). figure 4. transient response to dynamic load change from 50% to 100% at 12vin, cout- 3x47uf+6x330uf, ctune-47nf, rtune-180ohms output voltage on/off voltage v o (v) (200mv/div) v on/off (v) (5v/div) output voltage input voltage v o (v) (200mv/div) v in (v) (5v/div) time, t (2ms/div) time, t (2ms/div) figure 5. typical start-up using on/off voltage (i o = i o,max ). figure 6. typical start-up using input voltage (v in = 12v, i o = i o,max ). 50 55 60 65 70 75 80 85 90 024681012 vin=3.3v vin=14.4 v vin=12v 0 2 4 6 8 10 12 55 65 75 85 95 105 2m/s (400lfm) 1.5m/s (300lfm) 1m/s ( 200lfm ) 0.5m/s (100lfm) nc 2m/s (400lfm) 1.5m/s (300lfm) 1m/s ( 200lfm ) 0.5m/s (100lfm) nc standard part (85 c) ruggedized (d) part (105 c)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 7 characteristic curves the following figures provide typical characteristics for the 12a analog pico dlynx tm at 1.2vo and 25 o c. efficiency, (%) output current, io (a) output current, i o (a) ambient temperature, t a o c figure 7. converter efficiency versus output current. figure 8. derating output current versus ambient temperature and airflow. output voltage v o (v) (20mv/div) output current, output voltage i o (a) (10adiv) v o (v) (10mv/div) time, t (1 s/div) time, t (20 s /div) figure 9. typical output ripple and noise (c o =22 f ceramic, v in = 12v, i o = i o,max, ). figure 10. transient response to dynamic load change from 50% to 100% at 12vin, cout- 1x47uf+3x330uf, ctune-10nf & rtune-220ohms output voltage on/off voltage v o (v) (500mv/div) v on/off (v) (5v/div) output voltage input voltage v o (v) (500mv/div) v in (v) (5v/div) time, t (2ms/div) time, t (2ms/div) figure 11. typical start-up using on/off voltage (i o = i o,max ). figure 12. typical start-up using input voltage (v in = 12v, i o = i o,max ). 50 55 60 65 70 75 80 85 90 95 024681012 vin=3.3v vin=14.4 v vin=12v 0 2 4 6 8 10 12 55 65 75 85 95 105 2m/s (400lfm) 1.5m/s (300lfm) 1m/s (200lfm) 0.5m/s (100lfm) nc standard part (85 c) ruggedized (d) part (105 c)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 8 characteristic curves the following figures provide typical characteristics for the 12a analog pico dlynx tm at 1.8vo and 25 o c. efficiency, (%) output current, io (a) output current, i o (a) ambient temperature, t a o c figure 13. converter efficiency versus output current. figure 14. derating output current versus ambient temperature and airflow. output voltage v o (v) (20mv/div) output current, output voltage i o (a) (10adiv) v o (v) (20mv/div) time, t (1 s/div) time, t (20 s /div) figure 15. typical output ripple and noise (c o =22 f ceramic, v in = 12v, i o = i o,max, ). figure 16. transient response to dynamic load change from 50% to 100% at 12vin, cout- 1x47uf+2x330uf,ctune-5600pf & rtune-270ohms output voltage on/off voltage v o (v) (500mv/div) v on/off (v) (5v/div) output voltage input voltage v o (v) (500mv/div) v in (v) (5v/div) time, t (2ms/div) time, t (2ms/div) figure 17. typical start-up using on/off voltage (i o = i o,max ). figure 18. typical start-up using input voltage (v in = 12v, i o = i o,max ). 60 65 70 75 80 85 90 95 100 024681012 vin=3.3v vin=14.4 v vin=12v 0 2 4 6 8 10 12 55 65 75 85 95 105 2m/s (400lfm) 1.5m/s (300lfm) 1m/s (200lfm) 0.5m/s (100lfm) nc standard part (85 c) ruggedized (d) part (105 c)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 9 characteristic curves the following figures provide typical characteristics for the 12a analog pico dlynx tm at 2.5vo and 25 o c. efficiency, (%) output current, io (a) output current, i o (a) ambient temperature, t a o c figure 19. converter efficiency versus output current. figure 20. derating output current versus ambient temperature and airflow. output voltage v o (v) (20mv/div) output current, output voltage i o (a) (10adiv) v o (v) (20mv/div) time, t (1 s/div) time, t (20 s /div) figure 21. typical output ripple and noise (c o =22 f ceramic, v in = 12v, i o = i o,max, ). figure 22. transient response to dynamic load change from 50% to 100% at 12vin, cout- 1x47uf+1x330uf,ctune-3300pf & rtune-270ohms output voltage on/off voltage v o (v) (1v/div) v on/off (v) (5v/div) output voltage input voltage v o (v) (1v/div) v in (v) (5v/div) time, t (2ms/div) time, t (2ms/div) figure 23. typical start-up using on/off voltage (i o = i o,max ). figure 24. typical start-up using input voltage (v in = 12v, i o = i o,max ). 60 65 70 75 80 85 90 95 100 024681012 vin=4.5v vin=14.4v vin=12v 0 2 4 6 8 10 12 55 65 75 85 95 105 2m/s (400lfm) 1.5m/s (300lfm) 1m/s (200lfm) 0.5m/s (100lfm) nc standard part (85 c) ruggedized (d) part (105 c)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 10 characteristic curves the following figures provide typical characteristics for the 12a analog pico dlynx tm at 3.3vo and 25 o c. efficiency, (%) output current, io (a) output current, i o (a) ambient temperature, t a o c figure 25. converter efficiency versus output current. figure 26. derating output current versus ambient temperature and airflow. output voltage v o (v) (20mv/div) output current output voltage i o (a) (10adiv) v o (v) (50mv/div) time, t (1 s/div) time, t (20 s /div) figure 27. typical output ripple and noise (c o =22 f ceramic, v in = 12v, i o = i o,max, ). figure 28. transient response to dynamic load change from 50% to 100% at 12vin, cout- 1x47uf+1x330uf,ctune-2700pf & rtune-330ohms output voltage on/off voltage v o (v) (1v/div) v on/off (v) (5v/div) output voltage input voltage v o (v) (1v/div) v in (v) (5v/div) time, t (2ms/div) time, t (2ms/div) figure 29. typical start-up using on/off voltage (i o = i o,max ). figure 30. typical start-up using input voltage (v in = 12v, i o = i o,max ). 70 75 80 85 90 95 100 024681012 vin=5v vin=14.4 v vin=12v 0 2 4 6 8 10 12 55 65 75 85 95 10 5 2m/s (400lfm) 1.5m/s (300lfm) 1m/s (200lfm) 0.5m/s (100lfm) nc standard part (85 c) ruggedized (d) part (105 c)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 11 characteristic curves the following figures provide typical characteristics for the 12a analog pico dlynx tm at 5vo and 25 o c. efficiency, (%) output current, io (a) output current, i o (a) ambient temperature, t a o c figure 31. converter efficiency versus output current. figure 32. derating output current versus ambient temperature and airflow. output voltage v o (v) (20mv/div) output current , output voltage i o (a) (10adiv) v o (v) (50mv/div) time, t (1 s/div) time, t (20 s /div) figure 33. typical output ripple and noise (c o =22 f ceramic, v in = 12v, i o = i o,max, ). figure 34. transient response to dynamic load change from 50% to 100% at 12vin, cout-5x47uf, ctune-1500pf & rtune-330ohms output voltage on/off voltage v o (v) (2v/div) v on/off (v) (5v/div) output voltage input voltage v o (v) (1v/div) v in (v) (5v/div) time, t (2ms/div) time, t (2ms/div) figure 35. typical start-up using on/off voltage (i o = i o,max ). figure 36. typical start-up using input voltage (v in = 12v, i o = i o,max ). 70 75 80 85 90 95 100 024681012 vin=7v vin=14.4v vin=12v 0 2 4 6 8 10 12 55 65 75 85 95 105 2m/s (400lfm) 1.5m/s (300lfm) 1m/s (200lfm) 0.5m/s (100lfm) nc ruggedized (d) part (105 c) standard part (85 c)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 12 design considerations input filtering the 12a analog pico dlynx tm module should be connected to a low ac-impedance source. a highly inductive source can affect the stability of the module. an input capacitance must be placed directly adjacent to the input pin of the module, to minimize input ripple voltage and ensure module stability. to minimize input voltage ripple, ceramic capacitors are recommended at the input of the module. figure 37 shows the input ripple voltage for various output voltages at 12a of load current with 2x22 f or 3x22 f ceramic capacitors and an input of 12v. input ripple voltage (mvp-p) output voltage (vdc) figure 37. input ripple voltage for various output voltages with 2x22 f or 3x22 f ceramic capacitors at the input (12a load). input voltage is 12v. output filtering the 12a analog pico dlynx tm modules are designed for low output ripple voltage and will meet the maximum output ripple specification with 0.1 f ceramic and 22 f ceramic capacitors at the output of the module. however, additional output filtering may be required by the system designer for a number of reasons. first, there may be a need to further reduce the output ripple and noise of the module. second, the dynamic response characteristics may need to be customized to a particular load step change. to reduce the output ripple and improve the dynamic response to a step load change, additional capacitance at the output can be used. low esr polymer and ceramic capacitors are recommended to improve the dynamic response of the module. figure 38 provides output ripple information for different external capacitance values at various vo and a full load current of 12a. for stable operation of the module, limit the capacitance to less than the maximum output capacitance as specified in the electrical specification table. optimal performance of the module can be achieved by using the tunable loop tm feature described later in this data sheet figure 38. output ripple voltage for various output voltages with external 1x22 f, 1x47 f, 2x47 f or 4x47 f ceramic capacitors at the output (12a load). input voltage is 12v. safety considerations for safety agency approval the power module must be installed in compliance with the spacing and separation requirements of the end-use safety agency standards, i.e., ul 60950-1 2nd, csa c22.2 no. 60950-1-07, din en 60950-1:2006 + a11 (vde0805 teil 1 + a11):2009-11; en 60950-1:2006 + a11:2009- 03. for the converter output to be considered meeting the requirements of safety extra-low voltage (selv), the input must meet selv requirements. the power module has extra-low voltage (elv) outputs when all inputs are elv. the input to these units is to be provided with a time delay fuse with a maximum rating of 15 a in the positive input lead . 50 100 150 200 250 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 2x22uf 3x22uf 0 10 20 30 40 50 60 0.5 1.5 2.5 3.5 4.5 ripple (mvp-p) output voltage(volts) 1x22uf ext cap 1x47uf ext cap 2x47uf ext cap 4x47uf ext cap
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 13 feature descriptions remote on/off the 12a analog pico dlynx tm power modules feature an on/off pin for remote on/off operation. two on/off logic options are available. in the positive logic on/off option, (device code suffix ?4? ? see ordering information), the module turns on during a logic high on the on/off pin and turns off during a logic low. with the negative logic on/off option, (no device code suffix, see ordering information), the module turns off during logic high and on during logic low. the on/off signal should be always referenced to ground. for either on/off logic option, leaving the on/off pin disconnected will turn the module on when input voltage is present. for positive logic modules, the circuit configuration for using the on/off pin is shown in figure 39. when the external transistor q1 is in the off state, the internal pwm enable signal is pulled high through an internal resistor and the external pullup resistor and the module is on. when transistor q1 is turned on, the on/off pin is pulled low and the module is off. a suggested value for r pullup is tbd tba figure 39. circuit configuration for using positive on/off logic. for negative logic on/off modules, the circuit configuration is shown in fig. 40. the on/off pin should be pulled high with an external pull-up resistor (suggested value for the 3v to 14.4v input range is 20kohms). when transistor q1 is in the off state, the on/off pin is pulled high, internal transistor q4 is turned on and the module is off. to turn the module on, q1 is turned on pulling the on/off pin low, turning transistor q4 off resulting in the pwm enable pin going high and the module turning on. figure 40. circuit configuration for using negative on/off logic. monotonic start-up and shutdown the module has monotonic start-up and shutdown behavior for any combination of rated input voltage, output current and operating temperature range. startup into pre-biased output the modules can start into a prebiased output as long as the prebias voltage is 0.5v less than the set output voltage. output voltage programming the output voltage of the module is programmable to any voltage from 0.6dc to 5.5vdc by connecting a resistor between the trim and gnd pins of the module. certain restrictions apply on the output voltage set point depending on the input voltage. these are shown in the output voltage vs. input voltage set point area plot in fig. 41. the upper limit curve shows that for output voltages lower than 1v, the input voltage must be lower than the maximum of 14.4v. the lower limit curve shows that for output voltages higher than 0.6v, the input voltage needs to be larger than the minimum of 3v. figure 41. output voltage vs. input voltage set point area plot showing limits where the output voltage can be set for different input voltages. v o (+ ) trim r trim load v in (+) on/off vs+ gnd figure 42. circuit configuration for programming output voltage using an external resistor. pvx012 negative logic figure 22k q4 rpullup i on/off gnd vin+ on/off 22k pwm enable + _ on/off v css q1 mod u l e 0 2 4 6 8 10 12 14 16 0.511.522.533.544.555.56 input voltage (v) output voltage (v) lower upper
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 14 without an external resistor between trim and gnd pins, the output of the module will be 0.6vdc. to calculate the value of the trim resistor, rtrim for a desired output voltage, should be as per the following equation: () ? ? ? ? ? ? ? = k vo rtrim 6 . 0 12 rtrim is the external resistor in k ? vo is the desired output voltage. table 1 provides rtrim values required for some common output voltages. table 1 v o, set (v) rtrim ( k ? ) 0.6 open 0.9 40 1.0 30 1.2 20 1.5 13.33 1.8 10 2.5 6.316 3.3 4.444 5.0 2.727 remote sense the power module has a remote sense feature to minimize the effects of distribution losses by regulating the voltage at the sense pin. the voltage between the sense pin and vout pin should not exceed 0.5v. voltage margining output voltage margining can be implemented in the module by connecting a resistor, r margin-up , from the trim pin to the ground pin for margining-up the output voltage and by connecting a resistor, r margin-down , from the trim pin to output pin for margining-down. figure 43 shows the circuit configuration for output voltage margining. the pol programming tool, available at www.lineagepower.com under the downloads section, also calculates the values of r margin-up and r margin-down for a specific output voltage and % margin. please consult your local lineage power technical representative for additional details. figure 43. circuit configuration for margining output voltage. overcurrent protection to provide protection in a fault (output overload) condition, the unit is equipped with internal current-limiting circuitry and can endure current limiting continuously. at the point of current-limit inception, the unit enters hiccup mode. the unit operates normally once the output current is brought back into its specified range. overtemperature protection to provide protection in a fault condition, the unit is equipped with a thermal shutdown circuit. the unit will shutdown if the overtemperature threshold of 120(q1) / 130(l1) o c(typ) is exceeded at the thermal reference point t ref . once the unit goes into thermal shutdown it will then wait to cool before attempting to restart. input undervoltage lockout at input voltages below the input undervoltage lockout limit, the module operation is disabled. the module will begin to operate at an input voltage above the undervoltage lockout turn-on threshold. vo module gnd trim q1 rtrim rmargin-up q2 rmargin-down
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 15 power good the module provides a power good (pgood) signal that is implemented with an open-drain output to indicate that the output voltage is within the regulation limits of the power module. the pgood signal will be de-asserted to a low state if any condition such as overtemperature, overcurrent or loss of regulation occurs that would result in the output voltage going 10% outside the setpoint value. the pgood terminal can be connected through a pullup resistor (suggested value 100k ) to a source of 5vdc or lower. dual layout identical dimensions and pin layout of analog and digital pico dlynx modules permit migration from one to the other without needing to change the layout. to support this, 2 separate trim resistor locations have to be provided in the layout. for the digital modules, the resistor is connected between the trim pad and sgnd and in the case of the analog module it is connected between trim and gnd caution ? do not connect sig_gnd to gnd elsewhere in the layout figure 44. layout to support either analog or digital picodlynx on the same pad. tunable loop tm the 12a pico dlynx tm modules have a feature that optimizes transient response of the module called tunable loop tm . external capacitors are usually added to the output of the module for two reasons: to reduce output ripple and noise (see figure 38) and to reduce output voltage deviations from the steady-state value in the presence of dynamic load current changes. adding external capacitance however affects the voltage control loop of the module, typically causing the loop to slow down with sluggish response. larger values of external capacitance could also cause the module to become unstable. the tunable loop tm allows the user to externally adjust the voltage control loop to match the filter network connected to the output of the module. the tunable loop tm is implemented by connecting a series r-c between the sense and trim pins of the module, as shown in fig. 45. this r-c allows the user to externally adjust the voltage loop feedback compensation of the module. figure. 45. circuit diagram showing connection of r tume and c tune to tune the control loop of the module. recommended values of r tune and c tune for different output capacitor combinations are given in tables 2 and 3. table 2 shows the recommended values of r tune and c tune for different values of ceramic output capacitors up to 1000uf that might be needed for an application to meet output ripple and noise requirements. selecting r tune and c tune according to table 2 will ensure stable operation of the module. in applications with tight output voltage limits in the presence of dynamic current loading, additional output capacitance will be required. table 3 lists recommended values of r tune and c tune in order to meet 2% output voltage deviation limits for some common output voltages in the presence of a 6a to 12a step change (50% of full load), with an input voltage of 12v. module vout sense trim gnd rtune ctune rtrim c o module (pvx012 / pdt012) rtrim1 for digital gnd (pin 7) sig_gnd trim rtrim2 for a nalog
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 16 please contact your lineage power technical representative to obtain more details of this feature as well as for guidelines on how to select the right value of external r-c to tune the module for best transient performance and stable operation for other output capacitance values or input voltages other than 12v. table 2. general recommended values of of r tune and c tune for vin=12v and various external ceramic capacitor combinations. co 1x47 f 2x47 f 4x47 f 6x47 f 10x47 f 20x47 f r tune 330 330 330 330 270 180 c tune 100pf 560pf 1500pf 2200pf 3900pf 6800pf table 3. recommended values of r tune and c tune to obtain transient deviation of 2% of vout for a 6a step load with vin=12v. vo 5v 3.3v 2.5v 1.8v 1.2v 0.6v co 5x47 f 1x47 f + 330 f polymer 3x47 f + 330 f polymer 1x47 f + 2x330 f polymer 1x47 f + 3x330 f polymer 3x47 f + 6x330 f polymer r tune 330 330 270 270 220 180 c tune 1500pf 2700pf 3300pf 5600pf 10nf 47nf v 99mv 58mv 47mv 34mv 24mv 12mv
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 17 thermal considerations power modules operate in a variety of thermal environments; however, sufficient cooling should always be provided to help ensure reliable operation. considerations include ambient temperature, airflow, module power dissipation, and the need for increased reliability. a reduction in the operating temperature of the module will result in an increase in reliability. the thermal data presented here is based on physical measurements taken in a wind tunnel. the test set-up is shown in figure 46. the preferred airflow direction for the module is in figure 47. a ir flow x power module w ind tunnel pwbs 12.7_ (0.50) 76.2_ (3.0) probe location for measuring airflow and ambient temperature 25.4_ (1.0) figure 46. thermal test setup. the thermal reference points, t ref used in the specifications are also shown in figure 45. for reliable operation the temperature at q1 should not exceed 120 o c and the temperature at l1 should not exceed 130 o c. the output power of the module should not exceed the rated power of the module (vo,set x io,max). please refer to the application note ?thermal characterization process for open-frame board- mounted power modules? for a detailed discussion of thermal aspects including maximum device temperatures. figure 47. preferred airflow direction and location of hot-spot of the module (tref).
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 18 example application circuit requirements: vin: 12v vout: 1.8v iout: 9a max., worst case load transient is from 6a to 9a vout: 1.5% of vout (27mv) for worst case load transient vin, ripple 1.5% of vin (180mv, p-p) ci1 decoupling cap - 1x0.01 f/16v ceramic capacitor (e.g. murata lll185r71e103ma01) ci2 2x22 f/16v ceramic capacitor (e.g. murata grm32er61c226ke20) ci3 47 f/16v bulk electrolytic co1 decoupling cap - 1x0.01 f/16v ceramic capacitor (e.g. murata lll185r71e103ma01) co2 2 x 47 f/6.3v ceramic capacitor (e.g. murata grm31cr60j476me19) co3 1 x 330 f/6.3v polymer (e.g. sanyo poscap) ctune 3300pf ceramic capacitor (can be 1206, 0805 or 0603 size) rtune 270 ohms smt resistor (can be 1206, 0805 or 0603 size) rtrim 10k smt resistor (can be 1206, 0805 or 0603 size, recommended tolerance of 0.1%) vout vout+ trim on/off co1 + ci3 pgood ctune rtrim rtune ci1 gnd module vin + sense vin+ ci2 co2 vout co3
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5. 5vdc output; 12a output current lineage power 19 document no: ds10-008 ver. 1.14 pdf name: pvx012a0x.pdf mechanical outline dimensions are in millimeters and (inches). tolerances: x.x mm 0.5 mm (x.xx in. 0.02 in.) [unless otherwise indicated] x.xx mm 0.25 mm (x.xxx in 0.010 in.) pin function pin function 1 on/off 10 pgood 2 vin 11 nc 3 gnd 12 nc 4 vout 13 nc 5 vs+ (sense) 14 nc 6 trim 15 nc 7 gnd 16 nc 8 nc 17 nc 9 nc 16 17 11 8 9 7 15 14 12 13
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5. 5vdc output; 12a output current lineage power 20 recommended pad layout dimensions are in millimeters and (inches). tolerances: x.x mm 0.5 mm (x.xx in. 0.02 in.) [unless otherwise indicated] x.xx mm 0.25 mm (x.xxx in 0.010 in.) pin function pin function 1 on/off 10 pgood 2 vin 11 nc 3 gnd 12 nc 4 vout 13 nc 5 vs+ (sense) 14 nc 6 trim 15 nc 7 gnd 16 nc 8 nc 17 nc 9 nc 16 17 11 8 7 15 14 12 13 9
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 21 document no: ds10-008 ver. 1.14 pdf name: pvx012a0x.pdf packaging details the 12v analog pico dlynx tm 12a modules are supplied in tape & reel as standard. modules are shipped in quantities of 200 modules per reel. all dimensions are in millimeters and (in inches). reel dimensions: outside dimensions: 330.2 mm (13.00) inside dimensions: 177.8 mm (7.00?) tape width: 24.00 mm (0.945?)
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 22 surface mount information pick and place the 12vanalog pico dlynxtm 12a modules use an open frame construction and are designed for a fully automated assembly process. the modules are fitted with a label designed to provide a large surface area for pick and place operations. the label meets all the requirements for surface mount processing, as well as safety standards, and is able to withstand reflow temperatures of up to 300 o c. the label also carries product information such as product code, serial number and the location of manufacture. nozzle recommendations the module weight has been kept to a minimum by using open frame construction. variables such as nozzle size, tip style, vacuum pressure and placement speed should be considered to optimize this process. the minimum recommended inside nozzle diameter for reliable operation is 3mm. the maximum nozzle outer diameter, which will safely fit within the allowable component spacing, is 7 mm. bottom side / first side assembly this module is not recommended for assembly on the bottom side of a customer board. if such an assembly is attempted, components may fall off the module during the second reflow process. lead free soldering the 12vanalog pico dlynxtm 12a modules are lead- free (pb-free) and rohs compliant and fully compatible in a pb-free soldering process. failure to observe the instructions below may result in the failure of or cause damage to the modules and can adversely affect long-term reliability. pb-free reflow profile power systems will comply with j-std-020 rev. c (moisture/reflow sensitivity classification for nonhermetic solid state surface mount devices) for both pb-free solder profiles and msl classification procedures. this standard provides a recommended forced-air-convection reflow profile based on the volume and thickness of the package (table 4-2). the suggested pb-free solder paste is sn/ag/cu (sac). for questions regarding lga, solder volume; please contact lineage power for special manufacturing process instructions. the recommended linear reflow profile using sn/ag/cu solder is shown in fig. 48. soldering outside of the recommended profile requires testing to verify results and performance. msl rating the 12vanalog pico dlynxtm 12a modules have a msl rating of 1. storage and handling the recommended storage environment and handling procedures for moisture-sensitive surface mount packages is detailed in j-std-033 rev. a (handling, packing, shipping and use of moisture/reflow sensitive surface mount devices). moisture barrier bags (mbb) with desiccant are required for msl ratings of 2 or greater. these sealed packages should not be broken until time of use. once the original package is broken, the floor life of the product at conditions of 30c and 60% relative humidity varies according to the msl rating (see j-std-033a). the shelf life for dry packed smt packages will be a minimum of 12 months from the bag seal date, when stored at the following conditions: < 40 c, < 90% relative humidity. figure 48. recommended linear reflow profile using sn/ag/cu solder. post solder cleaning and drying considerations post solder cleaning is usually the final circuit-board assembly process prior to electrical board testing. the result of inadequate cleaning and drying can affect both the reliability of a power module and the testability of the finished circuit-board assembly. for guidance on appropriate soldering, cleaning and drying procedures, refer to board mounted power modules: soldering and cleaning application note (an04-001). per j-std-020 rev. c 0 50 100 150 200 250 300 reflow time (seconds) reflow temp (c) heating zone 1c/second peak temp 260c * min. time above 235c 15 seconds *time above 217c 60 seconds cooling zone
data sheet january 19, 2012 12a analog pico dlynx tm : non-isolated dc-dc power modules 3 ? 14.4vdc input; 0.6vdc to 5.5vdc output; 12a output current lineage power 23 document no: ds10-008 ver. 1.14 pdf name: pvx012a0x.pdf ordering information please contact your lineage power sales representative for pricing, availability and optional features. table 4. device codes device code input voltage range output voltage output current on/off logic sequencing comcodes PVX012A0X3-SRZ 3 ? 14.4vdc 0.6 ? 5.5v dc 12a negative no cc109159686 pvx012a0x3-srdz 3 ? 14.4vdc 0.6 ? 5.5vdc 12a negative no cc109168811 pvx012a0x43-srz 3 ? 14.4vdc 0.6 ? 5.5vdc 12a positive no tba* -z refers to rohs compliant parts *please contact lineage power for more information table 5. coding scheme package identifier family sequencing option output current output voltage on/off logic remote sense options rohs compliance p v x 012a0 x 3 -sr -d z p=pico u=micro m=mega g=giga d=dlynx digital v = dlynx analog. t=with ez sequence x=without sequencing 12a x = programm able output 4 = positive no entry = negative 3 = remote sense s = surface mount r = tape & reel d = 105 c operating ambient, 40g operating shock as per mil std 810f z = rohs6 world wide headquarters lineage power corporation 601 shiloh road, plano, tx 75074, usa +1-888-lineage(546-3243) (outside u.s.a.: +1-972-244-watt(9288) ) www.lineagepower.com e-mail: techsupport1@lineagepower.com asia-pacific headquarters tel: +86.021.54279977*808 europe, middle-east and africa headquarters tel: +49.89.878067-280 india headquarters tel: +91.80.28411633 lineage power reserves the right to make changes to the product(s) or information contained herein without notice. no liability is assumed as a result of their use or a pplication. no rights under any patent accompany the sale of any such product(s) or information. lineage power dc-dc products are protected under various patents. information on these patents is available at www.lineagepower.com/patents . ? 2011 lineage power corporation, (plano, texas) all international rights reserved.

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